This invention relates to amplifier circuits and, in particular, to amplifier circuits intended to be operated in two different modes.
In certain applications such as switched capacitor systems, an amplifier, functioning as a comparator used to detect the difference between two signals, is normally operated in two modes. In the first mode, also termed herein the "initialization" or "auto-zero" phase, offset voltages are determined and stored and applied to the input(s) of the amplifier which are preset to some initial states and/or reference levels. This is better explained by reference to FIG. 1 which shows a prior art auto-zeroed comparator circuit.
An operational amplifier A1 which is a high gain amplifier has an inverting input 11, a non-inverting input 13, and an output terminal 101. For ease of discussion, the amplifier A1 of FIG. 1 is shown to include two amplifying stages 103 and 105. The first stage 103 is a differential input stage connected to inputs 11 and 13 and has an output 104 connected to the input of a second amplifying stage 105 whose output is connected to output terminal 101. A feedback compensation network comprised of a resister R1 and a capacitor C1 is connected between the input and output of the second amplifying stage 105.
A feedback switch S1 is connected between output terminal 101 and inverting input node 11. When S1 is closed (enabled) it provides a low impedance conduction path between the output terminal 101 and input node 11. Offset voltages produced when S1 is closed are stored at node 11. When S1 is closed, it is necessary that amplifier A1 be stable. To meet this requirement, the components R1 and C1 of the feedback compensation network are selected and designed to ensure that amplifier A1 is stable. To satisfy the stability criteria, the feedback combination of R1 and C1 lowers the gain of the amplifier at the higher frequencies and lowers the bandwidth to avoid oscillations.
Thus the values of R1 and C1 are selected such that during the mode auto-zero of operation amplifier A1 with switch S1 closed functions as a unity gain, stable, operational amplifier.
In the second mode of operation also referred to herein as the "amplifying" mode the switch S1 is opened and input signals are applied to the amplifier. In FIG. 1, capacitors CA1 and CA2 are connected to terminal 11 to couple different signals to be compared while a reference voltage VREF is applied to input 13. During the amplifying mode it is required that the amplifier respond as quickly as possible to very small signal variations. To meet this requirement, the amplifier must have high gain at high frequencies and must have a wide bandwidth. However, the presence of R1 and C1 limit the gain and the frequency response of the circuit.
In circuits known to applicants, as shown in FIG. 2, the resistance R1 may be formed by connecting the conduction paths of two complementary transistors in parallel; one transistor NA being of N-conductivity type and the other PA being of P-conductivity type. The gate of the P-type transistor (PA) is permanently connected to ground and the gate of the N-type transistor (NA) is permanently connected to the positive power supply, VDD. The sizes of the P- and N-type transistors are selected to provide the desired value of resistance for R1 and since the gates of the transistors ar permanently connected to ground and VDD, the resistance R1 is permanently connected in the circuit.
As noted above, the R1-C1 network, connected to the amplifier provides compensation to ensure that the amplifier is in a stable condition during the auto-zero mode of operation. However as also noted the R1-C1 network presents a significant problem in that it limits the gain, the high frequency response, and the bandwidth during the signal amplifying operating mode.
The problem discussed above is resolved in circuits embodying the invention.